PCI: altera: Allow building as module

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Altera PCIe Rootport IP is a soft IP and is only available after
an FPGA image (whose design contains it) is programmed.

Make driver modulable to support use cases when FPGA image is
programmed after the kernel has booted, so that the driver
can be loaded upon request.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

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Ley Foon Tan 2019-04-24 12:57:14 +08:00 • committed by Lorenzo Pieralisi

parent a188339ca5

commit ec15c4d0d5

2 changed files with 27 additions and 3 deletions

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2

drivers/pci/controller/Kconfig

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28

drivers/pci/controller/pcie-altera.c

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