drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime

Browse source

[ Upstream commit 9f05cfc78c ]

Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can
directly access it through MMIO during SRIOV runtime.

v2: use SOC15 interface to access registers

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

This commit is contained in:

ZhenGuo Yin 2023-08-28 14:18:52 +08:00 • committed by Greg Kroah-Hartman

parent 695f692bcd

commit ec71cc24b0

2 changed files with 6 additions and 20 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

13

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

View file

13

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

View file