drm/i915: Address broxton phy registers based on phy and channel number

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The port registers related to the phys in broxton map to different
channels and specific phys. Make that mapping explicit.

v2: Pass enum dpio_phy to macros instead of mmio base. (Imre)

v3: Fix typo in macros. (Imre)

v4: Also change variables from u32 to enum dpio_phy. (Imre)
    Remove leftovers from previous version. (Imre)

v5: Actually git add the changes.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476863940-6019-1-git-send-email-ander.conselvan.de.oliveira@intel.com

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This commit is contained in:

Ander Conselvan de Oliveira 2016-10-19 10:59:00 +03:00

parent e7583f7b10

commit ed37892e6d

4 changed files with 175 additions and 120 deletions

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2

drivers/gpu/drm/i915/i915_drv.h

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141

drivers/gpu/drm/i915/i915_reg.h

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68

drivers/gpu/drm/i915/intel_dpio_phy.c

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84

drivers/gpu/drm/i915/intel_dpll_mgr.c

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