ASoC: tlv320aic3x: Mark the RESET register as volatile

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[ Upstream commit 63c3194b82 ]

The RESET register only have one self clearing bit and it should not be
cached. If it is cached, when we sync the registers back to the chip we
will initiate a software reset as well, which is not desirable.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Peter Ujfalusi 2016-12-23 11:21:10 +02:00 • committed by Greg Kroah-Hartman

parent ca40b2d039

commit ed788dc6fa

1 changed files with 13 additions and 0 deletions

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sound/soc/codecs/tlv320aic3x.c

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