drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN

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[why&how]
write LINK_SQUARE_PATTERN_num + 1 for square pulse pattern.
Specs requirement to write this register prior to write LINK_QUAL_LANEX_SET.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Wenjing Liu 2021-10-15 12:48:41 -04:00 • committed by Alex Deucher

parent 589bd2f03f

commit edcf52caa9

2 changed files with 11 additions and 0 deletions

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8

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

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3

drivers/gpu/drm/amd/display/dc/dc_dp_types.h

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