drm/i915: add haswell_set_pipeconf

Browse source

It's a copy of ironlake_set_pipeconf with 2 differences:
  - There is no BPC field to set.
  - The interlaced mask is now 2 bits instead of 3.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Paulo Zanoni 2012-10-05 12:05:57 -03:00 • committed by Daniel Vetter

parent 5dc5298bb3

commit ee2b0b382a

2 changed files with 27 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

1

drivers/gpu/drm/i915/i915_reg.h

View file

27

drivers/gpu/drm/i915/intel_display.c

View file