drm/amd/display: single PSR display not allow CSTATE sw w/a

Description:
HW issue when all the pipes are off, DCE_allow_cstate is 0.
New sequence : blank OTG only instead of previous OTG_master_en=0)

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2017-07-24 21:41:28 -04:00 • committed by Alex Deucher
commit ee356d8f4f
2 changed files with 8 additions and 1 deletions