drm/nv50/pm: introduce hwsq-based memory reclocking

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More work needs to be done on supporting the different memory types.

v2 (Ben Skeggs):
- fixed up conflicts from not having pausing patch first
- restructured code somewhat to fit with how all the other code works
- fixed bug where incorrect mpll_ctrl could get set sometimes
- removed stuff that's cargo-culted from the binary driver
- merged nv92+ display disable into hwsq
- fixed incorrect opcode 0x5f magic at end of ucode

Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

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Martin Peres 2011-11-07 23:38:50 +01:00 • committed by Ben Skeggs

parent abbd3f8e3b

commit eeb7a50bdd

2 changed files with 243 additions and 62 deletions

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98

drivers/gpu/drm/nouveau/nouveau_hwsq.h

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207

drivers/gpu/drm/nouveau/nv50_pm.c

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