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ARM: realview: set up cache correctly on the PB11MPCore
The L2 cache comes up in a "safe mode" on the PB11MPCore, as it has several issues. This sets it up properly with the right size and associativity, also requiring the outer sync to be disabled for the machine to boot properly. Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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