RISC-V: KVM: Disable all hpmcounter access for VS/VU mode

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Any guest must not get access to any hpmcounter including cycle/instret
without any checks. We achieve that by disabling all the bits except TM
bit in hcounteren.

However, instret and cycle access for guest user space can be enabled
upon explicit request (via ONE REG) or on first trap from VU mode
to maintain ABI requirement in the future. This patch doesn't support
that as ONE REG interface is not settled yet.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>

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Atish Patra 2023-02-07 01:55:25 -08:00 • committed by Anup Patel

parent 470926a290

commit f04bafb52f

1 changed files with 2 additions and 1 deletions

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arch/riscv/kvm/main.c

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