clk: rs9: Add support for 9FGV0841

Browse source

This model is similar to 9FGV0441, the DIFx bits start at bit 0 again,
except this chip has 8 outputs.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

...

This commit is contained in:

Marek Vasut 2023-11-13 23:18:54 +01:00 • committed by Stephen Boyd

parent cd9a5c97df

commit f0e5e18002

1 changed files with 9 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

9

drivers/clk/clk-renesas-pcie.c

View file