drm/i915/dg2: add gsc with special gsc bar offsets

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DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).

v2 (Daniele): Rebased to before the ATS patches

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> #v1
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220419193314.526966-7-daniele.ceraolospurio@intel.com

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This commit is contained in:

Tomas Winkler 2022-04-19 12:33:13 -07:00 • committed by Daniele Ceraolo Spurio

parent 1bc22fc53a

commit f15856d7de

3 changed files with 24 additions and 1 deletions

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22

drivers/gpu/drm/i915/gt/intel_gsc.c

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1

drivers/gpu/drm/i915/i915_pci.c

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2

drivers/gpu/drm/i915/i915_reg.h

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