soc: xilinx: vcu: implement PLL disable

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The disabling of the PLL is not fully implemented, because according to
the ZynqMP register reference the RESET, POR_IN and PWR_POR bits have to
be set to bring the PLL into reset.

Set the bits to disable the PLL.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210121071659.1226489-7-m.tretter@pengutronix.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Michael Tretter 2021-01-21 08:16:50 +01:00 • committed by Stephen Boyd

parent 354dcf7b02

commit f1bc982e7c

1 changed files with 19 additions and 9 deletions

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drivers/soc/xilinx/xlnx_vcu.c

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