drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS

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Robert noticed that the FF_SLICE_CS_CHICKEN2 offset was wrong. Ooops.

Ville noticed that the write was wrong since FF_SLICE_CS_CHICKEN2 is a
masked register. Re-oops.

A wonder if went through 2 people while having roughly a bug per line...

The problem was introduced in the original patch:

  commit 2caa3b260a
  Author: Damien Lespiau <damien.lespiau@intel.com>
  Date:   Mon Feb 9 19:33:20 2015 +0000

      drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS

v2: Also fix the register write (Ville)

Reported-by: Robert Beckett <robert.beckett@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Robert Beckett <robert.beckett@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Damien Lespiau 2015-05-06 14:36:27 +01:00 • committed by Daniel Vetter

parent 22e02c0b4b

commit f1d3d34d17

2 changed files with 2 additions and 3 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

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2

drivers/gpu/drm/i915/i915_reg.h

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3

drivers/gpu/drm/i915/intel_pm.c

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