[ARM] Always mark ARMv6 PTWs outer cacheable

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Other platforms other than SMP may have an outer cache.  For these, we
also need to mark the page table walks outer cacheable.  Since marking
the walks always outer cacheable apparantly has no side effects, we
might as well always mark them so.

However, we continue to only mark PTWs shared if we have SMP enabled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Russell King 2007-02-08 20:46:20 +00:00 • committed by Russell King

parent 3e1a80f11f

commit f2131d348f

1 changed files with 8 additions and 6 deletions

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arch/arm/mm/proc-v6.S

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