arm64: dts: microchip: add missing cache properties

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As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  sparx5_pcb125.dtb: l2-cache0: 'cache-level' is a required property

Link: https://lore.kernel.org/r/20230421223155.115339-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

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Krzysztof Kozlowski 2023-04-22 00:31:55 +02:00

parent 4c84cced93

commit f217d94fc6

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arch/arm64/boot/dts/microchip/sparx5.dtsi

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