clk: mediatek: mt6795: Add support for frequency hopping through FHCTL

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Add FHCTL parameters and register PLLs through FHCTL to add support
for frequency hopping and SSC. FHCTL will be enabled only on PLLs
specified in devicetree.

This commit brings functional changes only upon addition of
devicetree configuration.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230206100105.861720-5-angelogioacchino.delregno@collabora.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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AngeloGioacchino Del Regno 2023-02-06 11:01:02 +01:00 • committed by Stephen Boyd

parent 4ba8590f62

commit f222a1baec

1 changed files with 60 additions and 3 deletions

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drivers/clk/mediatek/clk-mt6795-apmixedsys.c

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