drm/amd/display: fix invalid reg access on DCN35 FPGA

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[Why]
Unguarded SMU and CLK IP access cause issue on FPGA

[How]
Guard them for FPGA environment

Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Eric Yang <eric.yang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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This commit is contained in:

Eric Yang 2024-01-16 14:50:55 -05:00 • committed by Alex Deucher

parent 7fc0d111ba

commit f2a905b01c

2 changed files with 23 additions and 4 deletions

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12

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

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15

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c

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