From f2b1095fe2e00b458ca5fa81aa8d9eeb075bd5c5 Mon Sep 17 00:00:00 2001 From: Candice Li Date: Fri, 17 Apr 2026 11:02:50 +0800 Subject: [PATCH] drm/amdgpu: load standalone RL firmware on psp v15_0_8 Add psp_init_rl_microcode() to request amdgpu/%s_rl.bin and populate psp->rl using the existing v1.0 PSP firmware header parsing. Wire it up for psp v15_0_8. Signed-off-by: Candice Li Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 20 ++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 4 ++++ drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c | 5 +++++ 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index d7d6623b51da..2a0ab763f59a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -4025,6 +4025,26 @@ out: return err; } +int psp_init_rl_microcode(struct psp_context *psp, const char *chip_name) +{ + int err; + + err = amdgpu_ucode_request(psp->adev, &psp->rl_fw, AMDGPU_UCODE_REQUIRED, + "amdgpu/%s_rl.bin", chip_name); + if (err) + goto out; + + err = parse_psp_v1_bin_descriptor(&psp->rl, + (const struct psp_firmware_header_v1_0 *)psp->rl_fw->data); + if (err) + goto out; + + return 0; +out: + amdgpu_ucode_release(&psp->rl_fw); + return err; +} + static int parse_psp_v2_bin_descriptor(struct psp_context *psp, const struct psp_fw_bin_desc *desc, const struct psp_firmware_header_v2_0 *sos_hdr) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h index 4047706c1ce2..ea3658e2be6d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h @@ -425,6 +425,9 @@ struct psp_context { /* cap firmware */ const struct firmware *cap_fw; + /* rl firmware */ + const struct firmware *rl_fw; + /* fence buffer */ struct amdgpu_bo *fence_buf_bo; uint64_t fence_buf_mc_addr; @@ -656,5 +659,6 @@ void amdgpu_psp_debugfs_init(struct amdgpu_device *adev); int amdgpu_psp_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type *type); int psp_set_mmhub_eco_sec_level(struct amdgpu_device *adev); +int psp_init_rl_microcode(struct psp_context *psp, const char *chip_name); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c b/drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c index ec20cd5eb755..57a079e3f356 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v15_0_8.c @@ -33,6 +33,7 @@ MODULE_FIRMWARE("amdgpu/psp_15_0_8_toc.bin"); MODULE_FIRMWARE("amdgpu/psp_15_0_8_toc_1.bin"); +MODULE_FIRMWARE("amdgpu/psp_15_0_8_rl.bin"); static int psp_v15_0_8_init_microcode(struct psp_context *psp) { @@ -46,6 +47,10 @@ static int psp_v15_0_8_init_microcode(struct psp_context *psp) if (err) return err; + err = psp_init_rl_microcode(psp, ucode_prefix); + if (err) + return err; + return 0; }