drm/radeon/r600: fix tiling issues in CS checker.

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The CS checker had some incorrect alignment requirements for 2D surfaces,
this made rendering to mipmap levels that were 2D broken.

Also the CB height was being worked out from the BO size, this doesn't work
at all when rendering mipmap levels, instead we work out what height userspace
wanted from slice max and use that to check it fits inside the BO, however
the DDX send the wrong slice max for an unaligned buffer so we have to workaround
for that even though its a userspace bug.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

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This commit is contained in:

Dave Airlie 2010-10-21 13:55:40 +10:00

parent e3ce8a0b27

commit f30df2fad0

2 changed files with 22 additions and 10 deletions

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29

drivers/gpu/drm/radeon/r600_cs.c

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3

drivers/gpu/drm/radeon/radeon_drv.c

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