clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs

Browse source

[ Upstream commit 20e1d75bc0 ]

The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.

Fixes: 4a66e76fdb ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230725-topic-8280_dispcc_gdsc-v1-1-236590060531@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

This commit is contained in:

Konrad Dybcio 2023-07-25 10:51:56 +02:00 • committed by Greg Kroah-Hartman

parent c4f9c0a3a6

commit f3ad747e9d

1 changed files with 4 additions and 4 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

8

drivers/clk/qcom/dispcc-sc8280xp.c

View file