MIPS: lantiq: enable pci clk conditional for xrx200 SoC

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The xrx200 SoC family has the same PCI clock register layout as the AR9.
Enable the same quirk as for AR9

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4235/

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John Crispin 2012-08-16 08:25:42 +00:00

parent 3a6ac5004c

commit f40e1f9d85

1 changed files with 2 additions and 1 deletions

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arch/mips/lantiq/xway/sysctrl.c

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