drm/i915/display: Fix C20 pll selection for state verification

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Add pll selection check for C20 as well as
clock state verification0. We have been relying
on sw state to select A or B pll's. This is incorrect
as the hw might see this selection differently. This
patch fixes this shortcoming by reading pll selection
for both sw and hw states and compares if these two
selections match.

Fixes: 59be90248b ("drm/i915/mtl: C20 state verification")

v2: reword commit message and include fix to a
    original commit (Imre)
    Compare pll selection (Jani)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240102115741.118525-2-mika.kahola@intel.com

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This commit is contained in:

Mika Kahola 2024-01-02 13:57:39 +02:00

parent 93cbc1accb

commit f4304beadd

1 changed files with 15 additions and 10 deletions

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drivers/gpu/drm/i915/display/intel_cx0_phy.c

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