net: ethernet: mediatek: add support for GMAC0 connecting with external PHY through TRGMII

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Changing dynamically source clock, TX/RX delay and interface mode
used by TRGMII hardware module inside PHY capability polling routine
for adapting to the various speed of RGMII used by external PHY for
GMAC0.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Sean Wang 2016-09-22 10:33:55 +08:00 • committed by David S. Miller

parent 572de608e3

commit f430dea7c1

2 changed files with 61 additions and 2 deletions

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32

drivers/net/ethernet/mediatek/mtk_eth_soc.c

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31

drivers/net/ethernet/mediatek/mtk_eth_soc.h

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