arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1}

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The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ7 for ETH0 and
ETH1 respectively.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102221815.273719-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Lad Prabhakar 2023-01-02 22:18:15 +00:00 • committed by Geert Uytterhoeven

parent 85169df721

commit f4673e52db

1 changed files with 9 additions and 2 deletions

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arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

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