clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL

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The Zonda PLL has a 16 bit signed alpha and in the cases where the alpha
value is greater than 0.5, the L value needs to be adjusted accordingly.
Thus update the logic to handle the signed alpha val.

Fixes: f21b6bfecc ("clk: qcom: clk-alpha-pll: add support for zonda pll")
Cc: stable@vger.kernel.org
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-5-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Satya Priya Kakitapalli 2024-07-31 11:59:12 +05:30 • committed by Bjorn Andersson

parent 85e8ee59df

commit f4973130d2

1 changed files with 16 additions and 0 deletions

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drivers/clk/qcom/clk-alpha-pll.c

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