bus: mhi: Ensure correct ring update ordering with memory barrier

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The ring element data, though being part of coherent memory, still need
to be performed before updating the ring context to point to this new
element. That can be guaranteed with a memory barrier (dma_wmb).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

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Loic Poulain 2020-11-26 16:06:41 +01:00 • committed by Manivannan Sadhasivam

parent ec751369d6

commit f49b6aeb5c

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7

drivers/bus/mhi/core/main.c

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