drm/msm/adreno: Read the speed bins for a5xx targets

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Some 5xx based chipsets have different bins for GPU clock speeds.
Read the fuses (if applicable) and set the appropriate OPP table.
This will only work with OPP v2 tables - the bin will be ignored
for legacy pwrlevel tables.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

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Jordan Crouse 2017-11-21 12:40:56 -07:00 • committed by Rob Clark

parent 999ae6edc1

commit f56d9df656

1 changed files with 23 additions and 0 deletions

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drivers/gpu/drm/msm/adreno/a5xx_gpu.c

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