x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1

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The show/store_cache_disable routines depend unnecessarily on NUMA's
cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA.
Remove that dependency by using a helper which is always correct.

While at it, enable L3 Cache Index disable on rev D1 Istanbuls which
sport the feature too.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100218184339.GG20473@aftab>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>

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Borislav Petkov 2010-02-04 12:09:07 +01:00 • committed by H. Peter Anvin

parent 414bb144ef

commit f619b3d842

1 changed files with 3 additions and 3 deletions

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arch/x86/kernel/cpu/intel_cacheinfo.c

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