drm/i915/display/xe3lpd: Avoid setting YUV420_MODE in PIPE_MISC

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For Xe3_LPD the PIPE_MISC YUV420 Enable (bit 27), already implies enabling
full blend YUV420 mode and YUV420 Mode (bit 26) is removed.
Therefore, avoid setting YUV420 Mode for Xe3_LPD+ while programming
PIPE_MISC for YCbCr420 output format.

Bspec: 69749
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241113115531.3394962-1-ankit.k.nautiyal@intel.com

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Ankit Nautiyal 2024-11-13 17:25:31 +05:30

parent ca596b781a

commit f635e7657e

1 changed files with 10 additions and 5 deletions

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drivers/gpu/drm/i915/display/intel_display.c

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