ARM: debug: enable UART1 for socfpga Cyclone5

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Clément Péron 2018-10-09 13:28:37 +02:00 • committed by Dinh Nguyen
commit f6628486c8