drm/i915/selftests: Replace opencoded clflush with drm_clflush_virt_range

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We occasionally see that the clflush prior to a read of GPU data is
returning stale data, reminiscent of much earlier bugs fixed by adding a
second clflush for serialisation. As drm_clflush_virt_range() already
supplies the workaround, use it rather than open code the clflush
instruction.

References: 396f5d62d1 ("drm: Restore double clflush on the last partial cacheline")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730075351.15569-3-chris@chris-wilson.co.uk

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Chris Wilson 2018-07-30 08:53:51 +01:00

parent 39f3be162c

commit f6844a85e0

1 changed files with 17 additions and 21 deletions

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drivers/gpu/drm/i915/selftests/i915_gem_coherency.c

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