arm64: mm: cleanup stale AIVIVT references

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Since commit:

  155433cb36 ("arm64: cache: Remove support for ASID-tagged VIVT I-caches")

... the kernel no longer cares about AIVIVT I-caches, as these were
removed from the architecture.

This patch removes the stale references to such I-caches.

The comment in flush_context() is also updated to clarify when and where
the TLB invalidation occurs.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

...

This commit is contained in:

Mark Rutland 2017-11-21 11:59:13 +00:00 • committed by Will Deacon

parent 4fbd8d194f

commit f81a348728

2 changed files with 5 additions and 2 deletions

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2

arch/arm64/include/asm/cacheflush.h

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5

arch/arm64/mm/context.c

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