drm/i915: update FBC maximum fb sizes

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CTG/ILK/SNB/IVB support 4kx2k surfaces. HSW supports 4kx4k, but
without proper front buffer invalidation on the last 2k lines, so
don't enable FBC on these cases for now.

v2: Use gen >= 5, not gen > 4 (Daniel).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Paulo Zanoni 2013-06-04 16:53:39 -03:00 • committed by Daniel Vetter

parent 6c49f24180

commit f85da868e3

1 changed files with 12 additions and 3 deletions

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15

drivers/gpu/drm/i915/intel_pm.c

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