perf_counter, x86: Implement generalized cache event types, add AMD support

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Fill in amd_hw_cache_event_id[] with the AMD CPU specific events,
for family 0x0f, 0x10 and 0x11.

There's apparently no distinction between load and store events, so
we only fill in the load events.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

...

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Thomas Gleixner 2009-06-08 22:33:10 +02:00 • committed by Ingo Molnar

parent 1123e3ad73

commit f86748e91a

1 changed files with 102 additions and 0 deletions

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arch/x86/kernel/cpu/perf_counter.c

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