clk: imx8mn: fix int pll clk gate

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To Frac pll, the gate shift is 13, however to Int PLL the gate shift
is 11.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Peng Fan 2019-08-14 09:53:12 +08:00 • committed by Shawn Guo

parent be378b6007

commit f8cade8310

1 changed files with 6 additions and 6 deletions

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12

drivers/clk/imx/clk-imx8mn.c

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