drm/amdgpu: enable imu_rlc_ram programming for v11_0_3

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All gc v11_0_3 registers in gcvml2 range have different
register offset from the ones in gc v11_0_0. v11_0_3
imu_rlc_ram programming has to be separated from v11_0_0
implementation

v2: fix checkpatch errors (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Hawking Zhang 2022-07-02 10:20:03 +08:00 • committed by Alex Deucher

parent 5ddb5fe9e5

commit f926464e59

4 changed files with 181 additions and 1 deletions

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3

drivers/gpu/drm/amd/amdgpu/Makefile

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6

drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

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144

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.c

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29

drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.h

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