clk: imx7d: correct enet phy ref clock gates

Browse source

IMX7D_ENET_PHY_REF_ROOT_DIV supplies clock for PHY directly,
there is no clock gate after it, rename it to
IMX7D_ENET_PHY_REF_ROOT_CLK to avoid device tree change.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

...

This commit is contained in:

Anson Huang 2018-05-18 09:01:04 +08:00 • committed by Stephen Boyd

parent 60cc43fc88

commit f93f2ed94a

1 changed files with 1 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

3

drivers/clk/imx/clk-imx7d.c

View file