ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk

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cpsw_cpts_rft_clk has got the choice of 3 clocksources
 -dpll_core_m4_ck
 -dpll_core_m5_ck
 -dpll_disp_m2_ck

By default dpll_core_m4_ck is selected, witn this as clock
source the CPTS doesnot work properly. It gives clockcheck errors
while running PTP.

 clockcheck: clock jumped backward or running slower than expected!

By selecting dpll_core_m5_ck as the clocksource fixes this issue.
In AM335x dpll_core_m5_ck is the default clocksource.

Signed-off-by: George Cherian <george.cherian@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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George Cherian 2014-05-02 12:02:03 +05:30 • committed by David S. Miller

parent 09c5537246

commit f9786f419d

1 changed files with 16 additions and 0 deletions

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drivers/clk/ti/clk-43xx.c

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