perf/amd/ibs: Define macro for ldlat mask and shift

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Load latency filter threshold is encoded in config1[11:0]. Define a mask
for it instead of hardcoded 0xFFF. Unlike "config" fields whose layout
maps to PERF_{FETCH|OP}_CTL MSR, layout of "config1" is custom defined
so a new set of macros are needed for "config1" fields.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20260216042530.1546-2-ravi.bangoria@amd.com

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Ravi Bangoria 2026-02-16 04:25:24 +00:00 • committed by Peter Zijlstra

parent 1b044ff3c1

commit f9d55ccf01

2 changed files with 8 additions and 4 deletions

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11

arch/x86/events/amd/ibs.c

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1

arch/x86/include/asm/perf_event.h

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