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OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change
Clear the SDRC_POWER.PWRENA bit before putting the SDRAM into self-refresh mode. This prevents the SDRC from attempting to power off the SDRAM, which can cause the system to hang. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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