drm/sun4i: fix HSYNC and VSYNC polarity

Differently from other Lcd signals, HSYNC and VSYNC signals
result inverted if their bits are cleared to 0.

Invert their settings of IO_POL register.

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1518717288-123578-1-git-send-email-giulio.benetti@micronovasrl.com
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Giulio Benetti 2018-02-15 18:54:48 +01:00 • committed by Maxime Ripard
commit fa4127c5eb
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