drm/i915/dg1: gmbus pin mapping

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Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
From spec we have registers GPIO_CTL[1-4], so we should not do the 4->9
mapping as in ICL/TGL.

The values for VBT seem wrong in BSpec. For the current boards we
actually have a 1:1 mapping.

BSpec: 49311, 49945, 20124

Cc: Aditya Swarup <aditya.swarup@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201007002210.3678024-5-lucas.demarchi@intel.com

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This commit is contained in:

Lucas De Marchi 2020-10-06 17:22:07 -07:00

parent eafeb204b4

commit fb7318c37a

3 changed files with 24 additions and 4 deletions

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4

drivers/gpu/drm/i915/display/intel_bios.c

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15

drivers/gpu/drm/i915/display/intel_gmbus.c

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9

drivers/gpu/drm/i915/display/intel_hdmi.c

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