drm/i915: PLL registers need an offset on VLV

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v2: Dropped the clock gating registers

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2013-01-25 21:44:41 +02:00 • committed by Daniel Vetter

parent fba5d532d1

commit fc2de40986

1 changed files with 4 additions and 4 deletions

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drivers/gpu/drm/i915/i915_reg.h

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