drm/i915: Update indentation for VRR registers and bits

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Update the indentation for the VRR register definition and
its bits, and fix checkpatch issues to ensure smooth movement
of registers and bits.

--v2:
- Keep XELPD_VRR_CTL_VRR_GUARDBAND(x) to avoid readability (Ankit).
- Fix all indentation related VRR registers and bits instead of
checkpatch one.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240610072203.24956-2-mitulkumar.ajitkumar.golani@intel.com

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Mitul Golani 2024-06-10 12:51:54 +05:30 • committed by Suraj Kandpal

parent 76dbc41608

commit fc8fc81cb8

1 changed files with 87 additions and 87 deletions

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drivers/gpu/drm/i915/i915_reg.h

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