mfd: tps65218: Make INT[12] and STATUS registers volatile

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commit 773328da24 upstream.

STATUS register can be modified by the HW, so we
should bypass cache because of that.

In the case of INT[12] registers, they are the ones
that actually clear the IRQ source at the time they
are read. If we rely on the cache for them, we will
never be able to clear the interrupt, which will cause
our IRQ line to be disabled due to IRQ throttling.

Fixes: 44b4dc6 mfd: tps65218: Add driver for the TPS65218 PMIC
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Felipe Balbi 2014-12-26 13:28:20 -06:00 • committed by Greg Kroah-Hartman

parent 515939f381

commit fc904760b4

1 changed files with 11 additions and 0 deletions

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drivers/mfd/tps65218.c

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