clk: renesas: Updates for v6.15 (take two)

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- Add DMA clocks and reset on RZ/V2H,
   - Add thermal (TSU) clock and reset on RZ/G3E,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZ8sS7QAKCRCKwlD9ZEnx
 cGo8AQCoGNtUXy2CBoojiSzJs5MNwQCfFO50AJSqoumPH+BqNwEAmdEYmrxcM/PI
 vmLLalJAyrg2hb4XGlJg6pp1hvExPgo=
 =j/jD
 -----END PGP SIGNATURE-----

Merge tag 'renesas-clk-for-v6.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull more Renesas clk driver updates from Geert Uytterhoeven:

 - Add DMA clocks and reset on Renesas RZ/V2H
 - Add thermal (TSU) clock and reset on Renesas RZ/G3E

* tag 'renesas-clk-for-v6.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP
  clk: renesas: rzv2h: Adjust for CPG_BUS_m_MSTOP starting from m = 1
  clk: renesas: r7s9210: Distinguish clocks by clock type
  clk: renesas: rzg2l: Remove unneeded nullify checks
  clk: renesas: cpg-mssr: Remove obsolete nullify check
  clk: renesas: r9a09g057: Add entries for the DMACs

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This commit is contained in:

Stephen Boyd 2025-03-07 15:34:59 -08:00

parent a0e2025fda e1a098330e

commit fca77a6b21

7 changed files with 39 additions and 27 deletions

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10

drivers/clk/renesas/r7s9210-cpg-mssr.c

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drivers/clk/renesas/r9a09g047-cpg.c

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drivers/clk/renesas/r9a09g057-cpg.c

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drivers/clk/renesas/renesas-cpg-mssr.c

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drivers/clk/renesas/rzg2l-cpg.c

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drivers/clk/renesas/rzv2h-cpg.c

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drivers/clk/renesas/rzv2h-cpg.h

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