clk: mmp: pxa1908-apbc: Add reset cells

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It has been concluded by comparing the gate clock masks and vendor code
between PXA1908/28 that PXA1908's APBC, similarly to PXA1928's APBC, has
controllable reset lines. Describe these in the driver for correctness.

Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Duje Mihanović 2026-04-14 21:51:51 +02:00 • committed by Stephen Boyd

parent 85ad455f5f

commit fcfae77b39

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drivers/clk/mmp/clk-pxa1908-apbc.c

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