irqchip/loongson-eiointc: Route interrupt parsed from bios table

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[ Upstream commit 7fb83eb664 ]

Interrupt controller eiointc routes interrupts to CPU interface IP0 - IP7.

It is currently hard-coded that eiointc routes interrupts to the CPU
starting from IP1, but it should base that decision on the parent
interrupt, which is provided by ACPI or DTS.

Retrieve the parent's hardware interrupt number and store it in the
descriptor of the eointc instance, so that the routing function can utilize
it for the correct route settings.

[ tglx: Massaged change log ]

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250804081946.1456573-2-maobibo@loongson.cn
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

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Bibo Mao 2025-08-04 16:19:45 +08:00 • committed by Greg Kroah-Hartman

parent 5bf8cb4a1e

commit fd06538d8f

1 changed files with 17 additions and 4 deletions

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drivers/irqchip/irq-loongson-eiointc.c

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