drm/i915/xe3p_lpd: Expand bifield masks dbuf blocks fields

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On Xe3p_LPD, the dbuf blocks fields of different registers are now
documented as 13-bit fields. The dbuf isn't really large enough to need
the 13th bit, but let's go ahead and update the definition now just in
case some new display IP in future ends up needing the larger size. The
extra bit is an unused bit in previous display versions, so we can
safely just extend the existing definition.

Bspec: 69847, 69880, 72053
Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20251103-xe3p_lpd-basic-enabling-v3-5-00e87b510ae7@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

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Sai Teja Pottumuttu 2025-11-05 11:06:54 -03:00 • committed by Gustavo Sousa

parent 398fea0536

commit fd0e715adf

1 changed files with 6 additions and 6 deletions

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drivers/gpu/drm/i915/display/skl_universal_plane_regs.h

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